Robert Harley writes:
> Eugene Leitl (eugene.leitl@lrz.uni-muenchen.de) wrote:
> >I haven't read the source. Can somebody tell me how much ecdl would
> >profit from 128 bit MMX?
>
> I'm not sure what you mean by "128 bit MMX"!
It was a pretty wide shot. I might be getting a PSX2 (Playstation 2)
dev kit sometime soon, and we're at Wulfstation project were looking
around for a demo app. (Now there are OpenSource issues with Sony,
which might endanger the whole project, but we don't have definitive
information yet).
> Xavier and I looked into the possibility of using SSE instructions,
> a.k.a. KNI. Xavier patched a Linux kernel to allow the instructions
Ah, Intel's answer to 3D Now!.
> to be used and I wrote some code to do the ECDL arithmetic operations
> with them.
Are you aware of this thingy here? http://shay.ecn.purdue.edu/~swar/
Though not yet publicly available, you can access SWARC via a web
front end.
> There are 8 registers with 128 bits but most of the operations treat
> them as 4 floats, which is no use! There are load and store
> instructions of course and logical instructions (AND, XOR) but there
> are no shifts. =:-( This is a problem but it is still possible to do a
> bit-parallel ECDL implementation without them.
>
> Unfortunately the SSE operations seem to take twice as long as their
> MMX equivalents. Apparently all the 128-bit operations are broken
> down into two 64-bit operations. From some preliminary testing and
> timing runs, it didn't seem likely that we could gain any extra speed
> over MMX.
>
>
> On the other hand, Dan Oetting has been working on an Altivec version
> for PowerPC G4 processors. There are 32 registers with 128 bits and
> all the operations we need, including shifts, are available. It looks
> like this will produce a speed up, although it is not quite ready yet.
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